You have commented 339 times on Rantburg.

Your Name
Your e-mail (optional)
Website (optional)
My Original Nic        Pic-a-Nic        Sorry. Comments have been closed on this article.
Bold Italic Underline Strike Bullet Blockquote Small Big Link Squish Foto Photo
Science & Technology
Buzzfeed: Researchers Found Two Major Security Flaws In Processors That Affect Most Of The World's Computers
2018-01-04
Posted by:charger

#17  Are AMD processors affected?

Much, much less than Intel chips. All modern CPUs are vulnerable to Spectre attacks, but AMD says that its CPUs have “near zero” risk to one variant due to the way they’re constructed. The performance impact of Spectre patches are expected to be “negligible.”

There is “zero AMD vulnerability” to Meltdown thanks to chip design, AMD says. If operating system patches exclude AMD CPUs from the new Meltdown restrictions, the performance war between Intel’s chips and AMD’s new Ryzen CPUs may get even tighter.
- cite.
Posted by: Procopius2k   2018-01-04 22:05  

#16  Been working some on this at work. Seems Microsoft has a patch out and so does Red Hat (and CentOS). I expect Apple will follow suit.

Question is that the patch is said to impact performance to various degrees.
Posted by: CrazyFool   2018-01-04 21:37  

#15  And the one thing that physicists cannot stand is a smart ass...
Posted by: Sock Puppet of Doom   2018-01-04 19:01  

#14  AMD, ARM all of them have this problem.
Posted by: 3dc   2018-01-04 18:38  

#13  Good gosh. I only retired a few years ago and while what you say sounds reasonable the gray cells just aren't cooperating. I cut my teeth on Knuth in '79 and it served me well for 30 years, but...............................8^(
Posted by: AlanC   2018-01-04 15:58  

#12  Its great to be king AMD.
Posted by: Procopius2k   2018-01-04 15:28  

#11  Meltdown is also, short term, a very good argument for massive caches on the processor die. They would reduce the potential of a cache miss which opens these options. So if you are buying a new processor or machine optimize for the cpu with more massive on chip cache. (Intel top of the line of any design usually have much larger on chip cache)
Posted by: 3dc   2018-01-04 13:12  

#10  No idea what effects it has on virtual computers. Perhaps a solution is to fix it in virtualization and only have the new virtualization code running in ring 0 not an OS or program in anything but virtualization.
Posted by: 3dc   2018-01-04 11:14  

#9  so, cache line invalidation only sorta works..

typically, when one switches tasks one does cache invalidation in SW,.

Basically, you need Translation Lookaside buffers in multi-core architectures, to allow flexibility in CPU processor core allocation. otherwise moving a task from one core to the other will take a big penalty, you have to re-load the cache..


Posted by: 3dc   2018-01-04 10:26  

#8  typically, when one switches tasks one does cache invalidation in SW,. That is a question the study didn't even address.
Posted by: 3dc   2018-01-04 10:14  

#7  
Posted by: 3dc   2018-01-04 10:04  

#6  Wait until we have dice and a teapot in the circuit (quantum entangled quantum computing). Then adding Schrodinger's Cat to a calculation has to open up all sorts of strange outcomes.

Posted by: 3dc   2018-01-04 10:02  

#5  This explains it pretty well.

Basically it uses speculative execution to read an arbitrary address

Basically it does this via a side effect.

The execution doesn't stall when it reads from private memory, but continues until the processor separately decides if that location was allowed, (which is slow) so to stop a stall it AssUMes it works.

Now it uses the value it got from the memory multiplies it by the internal block size(4096) and that will request it.

Now before the exploit the 256 blocks of 4096 are made to be non-cached.

After the processor catches up with the non-allowed address (page fault) and reverts the speculative execution it will have un-cached a 4096 byte block of memory which will be at an offset representing the value of the byte at that (ARBITRARY!) address!

Brilliant!
Posted by: Bright Pebbles   2018-01-04 08:32  

#4  This work was supported in part by NSF awards #1514261 and #1652259, financial assistance award 70NANB15H328 from the U.S. Department of Commerce, National Institute of Standards and Technology, the 2017-2018 Rothschild Postdoctoral Fellowship, and the Defense Advanced Research Project Agency (DARPA)

By Design you say?
Posted by: Bright Pebbles   2018-01-04 08:08  

#3  I think the use of the word ‘flaw’ instead of ‘design’ is an editorial decision.
Posted by: Airandee    2018-01-04 06:23  

#2  I am wondering if they are due to speculative execution or virtualization hardware.
Posted by: 3dc   2018-01-04 01:53  

#1  Well I guess its time to fire up the ole Apple II... Or that old 68K Mac I have in my closet.
Posted by: CrazyFool   2018-01-04 00:24  

00:00